1. Technical Field
The present disclosure relates to computer aided design of integrated circuits (IC), and more specifically to simulating scan tests with reduced resources.
2. Related Art
Simulation is often performed during the design of an integrated circuit (IC). Simulation entails ensuring that a logical design of the IC, represented as data, performs its intended functions. Typically a simulation tool is used to provide various inputs to the circuit representation and various parameters/values are observed for compliance with the desired results/behavior.
There is a general need to simulate scan tests during design of ICs. As is well known, a scan test entails forming one or more chains of corresponding memory elements, scanning a corresponding test vector to each scan chain, and evaluating the circuit portions based on the respective states of the memory elements (due to the scanning). The values stored in the memory element due to such evaluation may again be scanned out and compared with expected vectors to determine whether the circuit design operated in a desired manner.
It is generally desirable that scan tests be simulated with reduced resource requirements (e.g., reduced computational requirements, memory requirements, etc.).